Запис Детальніше

Metastability Testing at FPGA Circuit Design using Propagation Time Characterization

Електронного архіву Харківського національного університету радіоелектроніки (Open Access Repository of KHNURE)

Переглянути архів Інформація
 
 
Поле Співвідношення
 
Creator Rogina, B. M.
Škoda, P.
Skala, K.
Michieli, I.
 
Date 2014-11-14T08:15:51Z
2014-11-14T08:15:51Z
2010
 
Identifier Metastability Testing at FPGA Circuit Design using Propagation Time Characterization / B. M. Rogina and all // Радиоэлектроника и информатика : науч.-техн. журн. – Х. : Изд-во ХНУРЭ, 2010. – Вып. 4. – С. 4-8.
http://hdl.handle.net/123456789/1548
 
Description This paper describes the measurement method
and experimental technique with advanced instrumentation setup for analysing the metastability behavior and performance measurement of flip-flops used in programmable logic devices. In order to demonstrate this testing approach,
the results for metastable characteristics parameters of one FPGA digital circuit fabricated commercially in 90 nm CMOS process are presented. The same test methods can also be used for evaluation of timing reliability in digital circuits as well.
 
Language en
 
Publisher ХНУРЭ
 
Subject terms—FPGA
metastability
testing
propagation time
 
Title Metastability Testing at FPGA Circuit Design using Propagation Time Characterization
 
Type Article