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Hardware reduction in FPGA-based compositional microprogram control units

Електронний архів E-archive DonNTU – (Electronic archive Donetsk National Technical University)

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Поле Співвідношення
 
Title Hardware reduction in FPGA-based compositional microprogram control units
 
Creator Barkalov, A.A.
Titarenko, L.A.
Miroshkin, A.N.
 
Subject CMCU
logic synthesis
code sharing
microcommand format
 
Description The new design method for compositional microprogram control units with code sharing is proposed. The method targets on reduction in the number of look-up table elements in the combinational part of control unit. Some additional control microinstructions containing codes of the classes of pseudoequivalent chains are used for operational linear chains modification. The proposed method is illustrated by an example. The research results for various graph-scheme of algorithms (GSA) are illustrated with the diagrams. Most desirable GSA characteristics for using proposed method were obtained.
 
Date 2011-06-30T11:51:01Z
2011-06-30T11:51:01Z
2009
 
Type Article
 
Identifier http://ea.donntu.edu.ua/handle/123456789/1080
 
Language en
 
Relation Proceedings of IEEE East-West Design & Test Symposium;
 
Publisher Moscow: The Institute of Electrical and Electronics Engineers