Reduction of hardware amount for control unit with address transformer
Електронний архів E-archive DonNTU – (Electronic archive Donetsk National Technical University)
Переглянути архів Інформація| Поле | Співвідношення | |
| Title |
Reduction of hardware amount for control unit with address transformer
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| Creator |
Barkalov, Alexandr A.
Titarenko, Larisa A. Lavrik, Alexandr S. |
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| Subject |
CPLD
PAL CMCU |
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| Description |
The method of hardware reduction is proposed oriented on control units and CPLD chips. The method is based on a wide fan-in of PAL macrocells allowing using more than one source of microinstruction address. The method of logical condition replacement is used for optimization of microinstruction addressing block. An example of proposed method application is given.
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| Date |
2012-01-08T12:09:37Z
2012-01-08T12:09:37Z 2012-01-08 |
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| Type |
Article
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| Identifier |
http://ea.donntu.edu.ua/handle/123456789/3707
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| Language |
en
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