Hardware methods to increase of algorithms for distributed logic simulation
Електронний архів E-archive DonNTU – (Electronic archive Donetsk National Technical University)
Переглянути архів Інформація| Поле | Співвідношення | |
| Title |
Hardware methods to increase of algorithms for distributed logic simulation
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| Creator |
Ладыженский Ю.В.
Тесленко Г.А. |
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| Subject |
distributed logic simualtion
hardware acceleration |
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| Description |
The subject of research is methods of hardware implementation of synchronization algorithms for a distributed logical simulation. The main idea is a creation of a structural model from a set of functional units. This provides equivalent mapping algorithms for a computational processes and data processing operations.
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| Date |
2012-03-14T19:09:17Z
2012-03-14T19:09:17Z 2006-05 |
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| Identifier |
Ladyzhensky Y.V., Teslenko G.A. Hardware methods to increase of algorithms for distributed logic simulation. // Proceeding of IEEE East-West Design & Test Workshop (EWDTW’06). Sochi, September 15-19, 2006. 484p. –pp.385
УДК 681.3 http://ea.donntu.edu.ua/handle/123456789/8685 |
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| Publisher |
Харьковский национальный университет радиоэлектроники
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