Reduction of Hardware Amount for Control Unit with Address Transformer
Електронного архіву Харківського національного університету радіоелектроніки (Open Access Repository of KHNURE)
Переглянути архів Інформація| Поле | Співвідношення | |
| Title |
Reduction of Hardware Amount for Control Unit with Address Transformer
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| Creator |
Barkalov, A. A.
Titarenko, L. A. Lavrik, A. S. |
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| Subject |
CPLD
CMCU address transformer |
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| Description |
The method of hardware reduction is proposed oriented on control units and CPLD chips. The method is based on a wide fan-in of PAL macrocells allowing using more than one source of microinstruction address. The method of logical condition replacement is used for optimization of microinstruction addressing block. An example of proposed method application is given.
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| Date |
2016-08-26T10:10:54Z
2016-08-26T10:10:54Z 2009 |
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| Type |
Article
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| Identifier |
Barkalov, A. A. Reduction of Hardware Amount for Control Unit with Address Transformer / A. A. Barkalov, L. A. Titarenko, A. S. Lavrik // Радиоэлектроника и информатика : науч.-техн. журн. – Х. : Изд-во ХНУРЭ, 2009. – Вып. 2. – С. 29-33.
http://openarchive.nure.ua/handle/document/1883 |
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| Language |
en
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| Publisher |
ХНУРЭ
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