Models for Embedded Repairing Logic Blocks
Електронного архіву Харківського національного університету радіоелектроніки (Open Access Repository of KHNURE)
Переглянути архів ІнформаціяПоле | Співвідношення | |
Title |
Models for Embedded Repairing Logic Blocks
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Creator |
Hahanov, V. I.
Frolov, A. Litvinova, E. I. Tiecoura, Yves |
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Subject |
Models for Embedded
Repairing Logic Blocks |
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Description |
The models of combinational circuits, focused on solving practical problems of embedded repairing components of the logic units are proposed. The logical circuit is complemented by operational and control automata for modeling digital devices, which increases processing time and hardware costs for creating a wrap of addressable elements. The structures can also be used for hardware modeling functionalities of digital projects by using PLD, which allows improving the performance of software model verification. The proposed solution of embedded gate repair for combinational circuits makes it possible to comprehensively solve the problem of autonomous repairing digital systems on chips due to the time and hardware project redundancy.
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Date |
2016-09-02T07:46:45Z
2016-09-02T07:46:45Z 2012 |
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Type |
Article
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Identifier |
Hahanov V. I. Models for Embedded Repairing Logic Blocks /Hahanov V. I., Litvinova E. I., Frolov A., Tiecoura Yves //Proceedings of IEEE East-West Design & Test Symposium (EWDTS’2012)
http://openarchive.nure.ua/handle/document/1968 |
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Language |
en
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Publisher |
EWDTS
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