Malicious Hardware: characteristics, classification and formal models
Електронного архіву Харківського національного університету радіоелектроніки (Open Access Repository of KHNURE)
Переглянути архів Інформація| Поле | Співвідношення | |
| Title |
Malicious Hardware: characteristics, classification and formal models
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| Creator |
Горбачев, В. А.
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| Subject |
Integrated circuit modeling
Hardware Switches Availability Hard disks Information security |
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| Description |
Electronic Systems (ES) that contain embedded malicious hardware represent a serious threat, especially for government, aeronautic, financial and energy system applications. MHs can be implemented as hardware modifications to application specific ICs (ASICs), microprocessors, digital signal processors, or as IP core modifications for field programmable gate arrays (FPGA) [1]. They are able to turn off the CPU, to send confidential information and bypass the software user authentication mechanisms. There are some important characteristics of this type of threat: standard testing methods, such as the common functional verification and Automatic Test Pattern Generation (ATPG) cannot always be used to solve the problem of detecting MH [2], [3]; identification of the threat sources without special tools is practically impossible; even in cases when an information security violation is detected, it is very difficult to prove that this action was performed by MH. These and other features make MHs very promising embedded devices for planning of electronic terrorism. Therefore, detecting and preventing approaches are in the attention centre of IT systems security investigation.
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| Date |
2016-11-09T22:23:55Z
2016-11-09T22:23:55Z 2014 |
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| Type |
Thesis
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| Identifier |
Gorbachov V. Malicious Hardware: characteristics, classification and formal models / V. Gorbachov // IEEE East-West Design & Test Symposium (EWDTS2014), Kiev, Ukraine, KhNURE, 2014, pp. 254-257.
978-1-4799-7630-0 http://openarchive.nure.ua/handle/document/3435 |
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| Language |
en_US
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| Publisher |
IEEE
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